![]() OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool Reserved memory: created CMA memory pool at 0x0000000078000000, size 640 MiB Booting Linux on physical CPU 0x0000000000 Video Link 0Can't find cec device id=0x3cįail to probe panel device to get any video link display timings ![]() Please find below the kernel startup sequence (i out some prints for debug): More information provided for the previous post.Īttached a picture that demonstrates the phenomenon. However i cannot see HSYNCs for each row (for 1920 x 1080 i would expect to see 1080 HSYNCs).Īttached are the original and my modified files for the panel driver. The problem i facing with is that data is not being sent.įor each frame i can see via scope that VSYNC and HSYNC signals appears according to the BACK and FRONT porch values which are stored in the struct drm_display_mode default_mode of the driver. In order to stream video from the i.MX8 over mipi dsi to the FPGA (can treat it as a panel display) i had to re-write the Raydium RM67191 MIPI-DSI panel driver (panel-raydium-rm67191.c). The FPGA works fine when use an HDMI display with an HDMI to MIPI DSI bridge - the output signals of the FPGA MIPI DSI to parallel block are recognized correctly with scope according to the display timings. My mission is to stream video from the i.MX8 over mipi dsi to an FPGA (Lattice cross link evaluation board) that contains a IP block of MIPI DSI to parallel video. ![]() I am using the i.MX8mm evk with Yoto zeus. ![]()
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